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[STM32F0][CooIDE] RFM73

Jack88

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Jack88 Aktywny debiutant

Jack88

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Witam

Posiadam dwie płytki stm32f0 oraz moduły RFM73. Próbuje nawiązać pomiędzy nimi komunikacje - jednakże zatrzymałem się na etapie modyfikowania bibliotek dedykowanych dla modułu RFM70 i STM32VL Discovery. Czy jest ktoś w stanie pomóc mi w napisaniu tych bibliotek? Poniżej zamieszczam czyste biblioteki dla RFM70 oraz STM32VL Discovery oraz próbę moich modyfikacji. Dodatkowo zamieszczam biblioteki dla RFM73, ale dla procesora PIC16F690.

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danioto Stały bywalec

danioto

Jakby Ci się udało to zrobić, to zamieść rozwiązanie, bo sam kiedyś próbowałem do tego usiąść, ale sesja mnie szybko skłoniła do robienia czego innego. Przyda się!

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Jack88 Aktywny debiutant

Jack88

  • Autor tematu

@up - tak próbowałem. Kolejne próby modyfikacji pod STM32F0 i RFM73 nie przyniosły oczekiwanego rezultatu. Nadal nie dochodzi do komunikacji.

rfm70.h

/* ****************************************************************************/
/*		  PWr																	*/
/*			01-12-2010r															*/
/*																			*/
/*			Program Grzegorza Kołodziejczyka										*/
/*			 RFM70 - header														*/
/*			uC STM8s - RFM70 (2,4 GHz)										    */
/*			ver. 1.0															  */
/*			 												*/
/*																		*/
/* ****************************************************************************/


#ifndef _RFM70_H_
#define _RFM70_H_
#include <stdio.h>
#include <stdarg.h>
#include <string.h>
#include "stm32f0xx.h"

#include "stm32f0xx_cec.h"
#include "stm32f0xx_crc.h"
#include "stm32f0xx_comp.h"
#include "stm32f0xx_dac.h"
//#include "stm32f0xx_dbgmcu.h"
#include "stm32f0xx_dma.h"
#include "stm32f0xx_exti.h"
#include "stm32f0xx_flash.h"
#include "stm32f0xx_gpio.h"
#include "stm32f0xx_syscfg.h"
#include "stm32f0xx_i2c.h"
#include "stm32f0xx_iwdg.h"
#include "stm32f0xx_pwr.h"
#include "stm32f0xx_rcc.h"
#include "stm32f0xx_rtc.h"
#include "stm32f0xx_spi.h"
#include "stm32f0xx_tim.h"
#include "stm32f0xx_usart.h"
#include "stm32f0xx_wwdg.h"
#include "stm32f0xx_misc.h"

#define CE_PORT		GPIOA
#define CE_PIN		GPIO_Pin_3

#define CSN_PORT	GPIOA
#define CSN_PIN		GPIO_Pin_4

#define SCK_PORT	GPIOA
#define SCK_PIN		GPIO_Pin_5

#define MISO_PORT	GPIOA
#define MISO_PIN	GPIO_Pin_6

#define MOSI_PORT	GPIOA
#define MOSI_PIN	GPIO_Pin_7

#define MAX_PACKET_LEN  32// max value is 32

//************************FSK COMMAND and REGISTER****************************************//


// SPI(RFM70) commands
typedef enum {
RD_RX_PLOAD							=	(unsigned char)0x61,  // Define RX payload register address
WR_TX_PLOAD							=	(unsigned char)0xA0,  // Define TX payload register address
FLUSH_TX								=	(unsigned char)0xE1,  // Define flush TX register command
FLUSH_RX								=	(unsigned char)0xE2,  // Define flush RX register command
REUSE_TX_PL							=	(unsigned char)0xE3,  // Define reuse TX payload register command
NOP_NOP									=	(unsigned char)0xFF  // Define No Operation, might be used to read status register
}	RFM70_Commands_TypeDef;

typedef enum {
W_TX_PAYLOAD_NOACK_CMD	=	(unsigned char)0xb0,
W_ACK_PAYLOAD_CMD				=	(unsigned char)0xa8,
R_RX_PL_WID_CMD					=	(unsigned char)0x60
}	RFM70_TRx_TypeDef;

typedef enum {
ACTIVATE_CMD						=	(unsigned char)0x50
}	RFM70_CommandsW_Typedef;
typedef enum {
READ_REG								= (unsigned char)0x00,  // Define read command to register
WRITE_REG								=	(unsigned char)0x20  // Define write command to register
} RFM70_RWReg_TypeDef;

// SPI(RFM70) registers(addresses)
typedef enum {
CONFIG				=	(unsigned char)0x00,  // 'Config' register address
EN_AA				=	(unsigned char)0x01,  // 'Enable Auto Acknowledgment' register address
EN_RXADDR		=	(unsigned char)0x02,  // 'Enabled RX addresses' register address
SETUP_AW			=	(unsigned char)0x03,  // 'Setup address width' register address
SETUP_RETR		=	(unsigned char)0x04,  // 'Setup Auto. Retrans' register address
RF_CH				=	(unsigned char)0x05,  // 'RF channel' register address
RF_SETUP			=	(unsigned char)0x06,  // 'RF setup' register address
STATUS				=	(unsigned char)0x07,  // 'Status' register address
OBSERVE_TX		=	(unsigned char)0x08,  // 'Observe TX' register address
CD						=	(unsigned char)0x09,  // 'Carrier Detect' register address
RX_ADDR_P0		=	(unsigned char)0x0A,  // 'RX address pipe0' register address
RX_ADDR_P1		=	(unsigned char)0x0B,  // 'RX address pipe1' register address
RX_ADDR_P2		=	(unsigned char)0x0C,  // 'RX address pipe2' register address
RX_ADDR_P3		=	(unsigned char)0x0D,  // 'RX address pipe3' register address
RX_ADDR_P4		=	(unsigned char)0x0E,  // 'RX address pipe4' register address
RX_ADDR_P5		=	(unsigned char)0x0F,  // 'RX address pipe5' register address
TX_ADDR			=	(unsigned char)0x10,  // 'TX address' register address
RX_PW_P0			=	(unsigned char)0x11,  // 'RX payload width, pipe0' register address
RX_PW_P1			=	(unsigned char)0x12,  // 'RX payload width, pipe1' register address
RX_PW_P2			=	(unsigned char)0x13,  // 'RX payload width, pipe2' register address
RX_PW_P3			=	(unsigned char)0x14,  // 'RX payload width, pipe3' register address
RX_PW_P4			=	(unsigned char)0x15,  // 'RX payload width, pipe4' register address
RX_PW_P5			=	(unsigned char)0x16,  // 'RX payload width, pipe5' register address
FIFO_STATUS	=	(unsigned char)0x17,  // 'FIFO Status Register' register address
FEATURE			=	(unsigned char)0x1D,	 // 'FEATURE register address
PAYLOAD_WIDTH=	(unsigned char)0x1f  // 'payload length of 256 bytes modes register address
}	RFM70_RegAddr_TypeDef;

typedef enum {
A_00	=	(unsigned char)0x00,
A_01	=	(unsigned char)0x01,
A_02	=	(unsigned char)0x02,
A_03	=	(unsigned char)0x03,
A_04	=	(unsigned char)0x04,
A_05	=	(unsigned char)0x05,
A_0C	=	(unsigned char)0x0C,
A_0D	=	(unsigned char)0x0D,
A_0E	=	(unsigned char)0x0E
} RFM70_RegAddr1_TypeDef;

//interrupt status
typedef enum {
STATUS_RX_DR 	= 	(unsigned char)0x40,
STATUS_TX_DS 	=		(unsigned char)0x20,
STATUS_MAX_RT =		(unsigned char)0x10,
STATUS_TX_FULL =	(unsigned char)0x01
} RFM70_IrqStat_TypeDef;

//FIFO_STATUS
typedef enum {
FIFO_STATUS_TX_REUSE = 	(unsigned char)0x40,
FIFO_STATUS_TX_FULL = 	(unsigned char)0x20,
FIFO_STATUS_TX_EMPTY = 	(unsigned char)0x10,

FIFO_STATUS_RX_FULL = 	(unsigned char)0x02,
FIFO_STATUS_RX_EMPTY = 	(unsigned char)0x01
}	RFM70_FifoStat_Typedef;

/*****************************

 FUNCTION DECLARATION

****************************/

void SPI_Read_Buf(unsigned char reg, unsigned char *pBuf, unsigned char bytes);
void SPI_Write_Buf(RFM70_RWReg_TypeDef RW,RFM70_RegAddr_TypeDef addr, unsigned char *pBuf, unsigned char length);

unsigned char SPI_Read_Reg(RFM70_RegAddr_TypeDef addr);
void SPI_Write_Reg(RFM70_RWReg_TypeDef RW,RFM70_RegAddr_TypeDef addr, unsigned char value);

void SPI_Command(RFM70_Commands_TypeDef cmd);

void RFM70_SwitchToTxMode(void);
void RFM70_SwitchToRxMode(void);

void SPI_Bank1_Read_Reg(unsigned char reg, unsigned char *pBuf);
void SPI_Bank1_Write_Reg(unsigned char reg, unsigned char *pBuf);
void SwitchCFG(char _cfg);

void CSN_Low(void);
void CSN_High(void);
void CE_Low(void);
void CE_High(void);

void RFM70_Initialize(void);

void Send_Packet(RFM70_TRx_TypeDef type,unsigned char* pbuf,unsigned char len);
void Receive_Packet(unsigned char *rx_buf);


// Banks initialize
void Ini_Bank0(void);
void Ini_Bank1(void);


void DelayMs(int ms);

#endif

rfm70.c

/* ****************************************************************************/
/*																			 PWr																	*/
/*																	 01-12-2010r															*/
/*																																						*/
/*												Program Grzegorza Kołodziejczyka										*/
/*													  		  RFM70 - library														*/
/*													 uC STM8s - RFM70 (2,4 GHz)										    */
/*																		ver. 1.0															  */
/*																  							     												*/
/*																																						*/
/* ****************************************************************************/

//#include "stm8s.h"
//#include "stm8s_spi.h"
#include <stddef.h>
#include "stm32f0xx.h"
#include "RFM70.h"

#include "stm32f0xx_cec.h"
#include "stm32f0xx_crc.h"
#include "stm32f0xx_comp.h"
#include "stm32f0xx_dac.h"
//#include "stm32f0xx_dbgmcu.h"
#include "stm32f0xx_dma.h"
#include "stm32f0xx_exti.h"
#include "stm32f0xx_flash.h"
#include "stm32f0xx_gpio.h"
#include "stm32f0xx_syscfg.h"
#include "stm32f0xx_i2c.h"
#include "stm32f0xx_iwdg.h"
#include "stm32f0xx_pwr.h"
#include "stm32f0xx_rcc.h"
#include "stm32f0xx_rtc.h"
#include "stm32f0xx_spi.h"
#include "stm32f0xx_tim.h"
#include "stm32f0xx_usart.h"
#include "stm32f0xx_wwdg.h"
#include "stm32f0xx_misc.h"

// ***********************************************
// 		sending to RFM70 MSB first
// **********************************************/

//Banks1 registers which must be writen
//0-8;	Byte(MSB->LSB), Bit(MSB->LSB)
const unsigned char Bank1_Reg00[]={0x40,0x4B,0x01,0xE2};
const unsigned char Bank1_Reg01[]={0xC0,0x4B,0x00,0x00};
const unsigned char Bank1_Reg02[]={0xD0,0xFC,0x8C,0x02};
const unsigned char Bank1_Reg03[]={0x99,0x00,0x39,0x41};
//const unsigned char Bank1_Reg04[]={0xD9,0x96,0x82,0x1B};
//const unsigned char Bank1_Reg04[]={0x0B,0x86,0x9E,0xF9};
//const unsigned char Bank1_Reg04[]={0xD9,0xB6,0x82,0x1B};
const unsigned char Bank1_Reg04[]={0xD9,0x9E,0x86,0x0B}; //Must  write  with
//const unsigned char Bank1_Reg04[]={0xD9,0x9E,0x86,0x21}; //For  single  carrier  mode:0xD99E8621
const unsigned char Bank1_Reg05[]={0x24,0x06,0x7F,0xA6};
const unsigned char Bank1_Reg08[]={0x00,0x00,0x00,0x63};
//12-14;	Byte(LSB->MSB), Bit(MSB->LSB)
/*0C
* Please  initialize  with  0x05731200
For  120us  mode:0x00731200
*/
const unsigned char Bank1_Reg0C[]={0x00,0x12,0x73,0x00};
//const unsigned char Bank1_Reg0C[]={0x00,0x12,0x73,0x05};
//const unsigned char Bank1_Reg0D[]={0x36,0xB4,0x80,0x00};
//const unsigned char Bank1_Reg0D[]={0x46,0xB4,0x80,0x00};
const unsigned char Bank1_Reg0D[]={0x36,0xB4,0x80,0x00};
//const unsigned char Bank1_Reg0E[]={0x41,0x20,0x08,0x04,0x81,0x20,0xCF,0xF7,0xFE,0xFF,0xFF};
const unsigned char Bank1_Reg0E[]={0x41,0x10,0x04,0x82,0x20,0x08,0x08,0xF2,0x7D,0xEF,0xFF};

//Initializing values of Bank0 registres
const unsigned char Bank0_Reg[][2]={
{0x00,0x0F},//	0CONFIG	//	reflect RX_DR\TX_DS\MAX_RT,Enable CRC ,2byte,POWER UP,PRX
{0x01,0x3F},//	1EN_AA		//	Enable auto acknowledgement data pipe5\4\3\2\1\0
{0x02,0x3F},//	2EX_RXADDR	//	Enable RX Addresses pipe5\4\3\2\1\0
{0x03,0x03},//	3SETUP_AW	//RX/TX address field width 5byte
{0x04,0xff},//	4SETUP_RETR	//auto retransmission dalay (4000us),auto retransmission count(15)
{0x05,0x17},//	5RF_CH	//	23 channel
{0x06,0x17},//	6RF_SETUP	//air data rate-1M,out power 0dbm,setup LNA gain
{0x07,0x07},//	7STATUS	//
{0x08,0x00},//	8OBSERVER_TX	//
{0x09,0x00},//	9CD	//
{0x0C,0xc3},//	10RX_ADDR_P2	//	only LSB Receive address data pipe 2, MSB bytes is equal to RX_ADDR_P1[39:8]
{0x0D,0xc4},//	11RX_ADDR_P3	//	only LSB Receive address data pipe 3, MSB bytes is equal to RX_ADDR_P1[39:8]
{0x0E,0xc5},//	12RX_ADDR_P4	//	only LSB Receive address data pipe 4, MSB bytes is equal to RX_ADDR_P1[39:8]
{0x0F,0xc6},//	13RX_ADDR_P5	//	only LSB Receive address data pipe 5, MSB bytes is equal to RX_ADDR_P1[39:8]
{0x11,0x20},//	14RX_PW_P0	//	Number of bytes in RX payload in data pipe0(32 byte)
{0x12,0x20},//	15RX_PW_P1	//	Number of bytes in RX payload in data pipe1(32 byte)
{0x13,0x20},//	16RX_PW_P2	//	Number of bytes in RX payload in data pipe2(32 byte)
{0x14,0x20},//	17RX_PW_P3	//	Number of bytes in RX payload in data pipe3(32 byte)
{0x15,0x20},//	18RX_PW_P4	//	Number of bytes in RX payload in data pipe4(32 byte)
{0x16,0x20},//	19RX_PW_P5	//	Number of bytes in RX payload in data pipe5(32 byte)
{0x17,0x00},//	20FIFO_STATUS	//	fifo status
{0x1C,0x3F},//	21DYNPD	//	Enable dynamic payload length data pipe5\4\3\2\1\0
{0x1D,0x07}//	22FEATURE	//	Enables Dynamic Payload Length,Enables Payload with ACK,Enables the W_TX_PAYLOAD_NOACK command
};
//Address = Bank1_Reg0A pipe 0 & Bank1_Reg0B pipe 1; in Bank 0
//const unsigned char RX0_Address[]={0xE7,0xE7,0xE7,0xE7,0xE7};//Receive address data pipe 0	-> default value
//const unsigned char RX1_Address[]={0xC2,0xC2,0xC2,0xC2,0xC2};//Receive address data pipe 1 -> default value
//const unsigned char RX0_Address[]= {0x34,0x43,0x10,0x10,0x01};//Receive address data pipe 0
//const unsigned char RX1_Address[]= {0x39,0x38,0x37,0x36,0xc2};//Receive address data pipe 1
const unsigned char RX0_Address[]={0xE7,0xE7,0xE7,0xE7,0xE7};//Receive address data pipe 0	-> default value
const unsigned char RX1_Address[]={0xC2,0xC2,0xC2,0xC2,0xC2};//Receive address data pipe 1 -> default value
/*******************************************************************/
/*******************************************************************/

extern unsigned char rx_buf[MAX_PACKET_LEN];

extern void delay_200ms(void);
extern void delay_50ms(void);

unsigned char status;

// **************************************************
// Function: SPI_R/W(void);
// **************************************************/
unsigned char SPI_R(void)
{
//	while (SPI_GetFlagStatus(SPI_FLAG_TXE)== RESET) {}	// wait until TX buffer will be empty
while (SPI_I2S_GetFlagStatus(SPI1,SPI_I2S_FLAG_TXE)== RESET) {}	// wait until TX buffer will be empty
SPI_I2S_SendData16(SPI1,0);																		// Send no data - to read the value from register

//SPI_SendData8(SPI1,0);
while (SPI_I2S_GetFlagStatus(SPI1,SPI_I2S_FLAG_BSY) == SET) {}		// wait until SPI is ready
while (SPI_I2S_GetFlagStatus(SPI1,SPI_I2S_FLAG_RXNE)== RESET) {}	// wait until Rx buffer will be ready to read

return(SPI_I2S_ReceiveData16(SPI1));
//return(SPI_ReceiveData8(SPI1));
}
void SPI_W(unsigned char value)	// OK
{
while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_BSY) == SET) {}		// wait until SPI is ready
while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE)== RESET) {}	// wait until TX buffer will be empty
status=0;

SPI_I2S_SendData16(SPI1, value);																// Write the read register command
//SPI_SendData8(SPI1, value);
while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_BSY) == SET) {}		// wait until SPI is ready
while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE)== RESET) {}	// wait until Rx buffer will be ready to read
SPI_I2S_SendData16(SPI1, value);													// Read the status register
//SPI_SendData8(SPI1, value);
}

/**************************************************
Function: CSN_Low(); CSN_High();
**************************************************/
void CSN_Low(void)
{
GPIO_ResetBits(CSN_PORT, CSN_PIN);
}
void CSN_High(void)
{
GPIO_SetBits(CSN_PORT, CSN_PIN);
}

/**************************************************         
Function: CE_Low(); CE_High();
**************************************************/
void CE_Low(void){	GPIO_ResetBits(CE_PORT, CE_PIN);}
void CE_High(void){	GPIO_SetBits(CE_PORT, CE_PIN);}

void SPI_Command(RFM70_Commands_TypeDef cmd)
{
CSN_Low();	// CSN low, init SPI transaction
SPI_W(cmd);	// Do cmd
CSN_High();	// CSN high again, end SPI transaction
}
/**************************************************
Function: SPI_Write_Reg();                                  

Description:                                                
Writes value 'value' to register 'reg'              
**************************************************/
void SPI_Write_Reg(RFM70_RWReg_TypeDef write,RFM70_RegAddr_TypeDef addr, unsigned char value)
{
CSN_Low();	// CSN low, init SPI transaction
SPI_W(write|addr);	// select register
SPI_W(value);	// ..and write value to it..
CSN_High();	// CSN high again, end SPI transaction
}

/**************************************************         
Function: SPI_Read_Reg();                                   

Description:                                                
Read one unsigned char from RFM70 register, 'reg'
**************************************************/
unsigned char SPI_Read_Reg(RFM70_RegAddr_TypeDef addr)
{                                                           
unsigned char value;

CSN_Low();	// CSN low, initialize SPI transaction
SPI_W(addr);	// Select register to read from.
value = SPI_R();	// ..then read register value
CSN_High();	// CSN high, terminate SPI communication

return(value);	// return register value
}                                                           
/**************************************************/        

/**************************************************         
Function: SPI_Read_Buf();                                   

Description:                                                
Reads 'length' #of length from register 'reg'         
**************************************************/
void SPI_Read_Buf(unsigned char reg, unsigned char *pBuf, unsigned char length)
{                                                           
unsigned char byte_ctr;

CSN_Low();
SPI_W(reg);	// Select register to write, and read status unsigned char
for(byte_ctr=0;byte_ctr<length;byte_ctr++)
	pBuf[byte_ctr] = SPI_R();	// Perform SPI_RW to read unsigned char from RFM70
CSN_High();	// Set CSN high again
}
/**************************************************/

/**************************************************
Function: SPI_Write_Buf();

Description:
Writes contents of buffer '*pBuf' to RFM70
**************************************************/
void SPI_Write_Buf(RFM70_RWReg_TypeDef RW,RFM70_RegAddr_TypeDef addr, unsigned char *pBuf, unsigned char length)
{
unsigned char byte_ctr;

CSN_Low();	// Set CSN low, init SPI tranaction
SPI_W(RW|addr);	// Select register to write to and read status unsigned char
for(byte_ctr=0; byte_ctr<length; byte_ctr++) // then write all unsigned char in buffer(*pBuf)
	SPI_W(*pBuf++);
CSN_High();	// Set CSN high again

}

/**************************************************
Function: SPI_Activate(RFM_CommandsW_Typedef activate);
Description:
Change the bank0<->bank1
**************************************************/
void SPI_Activate(RFM70_CommandsW_Typedef activate, unsigned char cmd)
{
CSN_Low();
SPI_W(activate);
SPI_W(cmd);
CSN_High();
}
/***********INITIALIZE FUNCTIONS***************************

**************************************************
Function: SPI_Read_Buf();

Description:
Reads 'length' #of length from register 'reg'
**************************************************/
void SPI_Read_Ini_Buf(unsigned char reg, unsigned char *pBuf, unsigned char length)
{
unsigned char byte_ctr;

CSN_Low();
SPI_W(reg);	// Select register to write, and read status unsigned char
for(byte_ctr=0;byte_ctr<length;byte_ctr++)
	pBuf[byte_ctr] = SPI_R();	// Perform SPI_RW to read unsigned char from RFM70
CSN_High();	// Set CSN high again
}                                                           
/**************************************************/        

/**************************************************         
Function: SPI_Write_Ini_Buf();

Description:                                                
Writes contents of buffer '*pBuf' to RFM70
*************************************************/
void SPI_Write_Ini_Buf(RFM70_RWReg_TypeDef RW,RFM70_RegAddr1_TypeDef addr, unsigned char *pBuf, unsigned char length)
{                                                           
unsigned char byte_ctr;

CSN_Low();	// Set CSN low, init SPI tranaction
SPI_W(RW|addr);	// Select register to write to and read status unsigned char
for(byte_ctr=0; byte_ctr<length; byte_ctr++) // then write all unsigned char in buffer(*pBuf)
	SPI_W(*pBuf++);
CSN_High();	// Set CSN high again

}

/**************************************************
Function: SwitchToRxMode();
Description:
switch to Rx mode
**************************************************/
void RFM70_SwitchToRxMode()
{
unsigned char value;

SPI_Command(FLUSH_RX);//flush Rx
value=SPI_Read_Reg(STATUS);	// read register STATUS's value
SPI_Write_Reg(WRITE_REG,STATUS,value);// clear RX_DR or TX_DS or MAX_RT interrupt flag
CE_Low();
value=SPI_Read_Reg(CONFIG);	// read register CONFIG's value
//PRX
value=value|0x01;
 	SPI_Write_Reg(WRITE_REG, CONFIG, value); // Set PWR_UP bit, enable CRC(2 length) & Prim:RX. RX_DR enabled..
CE_High();
}

/**************************************************
Function: RFM70_SwitchToTxMode();
Description:
switch to Tx mode
**************************************************/
void RFM70_SwitchToTxMode()
{
unsigned char value;
SPI_Command(FLUSH_TX);//flush Tx
CE_Low();
value=SPI_Read_Reg(CONFIG);	// read register CONFIG's value
//PTX
	value=value&0xfe;	//	mask all bits without first / switch to PTX
 	SPI_Write_Reg(WRITE_REG, CONFIG, value); // Set PWR_UP bit, enable CRC(2 length) & Prim:RX. RX_DR enabled.
CE_High();
}

/**************************************************
Function: SwitchCFG();

Description:
 access switch between Bank1 and Bank0 

Parameter:
_cfg      1:register bank1
          0:register bank0
Return:
    None
**************************************************/
void SwitchCFG(char _cfg)//1:Bank1 0:Bank0
{
unsigned char Tmp;

Tmp=SPI_Read_Reg(STATUS);	//Read the STATUS register
Tmp=Tmp&0x80;	//Mask only the RBANK bit
if( ( (Tmp)&&(_cfg==0) )
||( ((Tmp)==0)&&(_cfg) ) )	//If bank isn't the same that is required, change it
{
	SPI_Activate(ACTIVATE_CMD, 0x53);	//sending the required command
}
}

/**************************************************
Function: SetChannelNum();
Description:
set channel number

**************************************************/
void SetChannelNum(unsigned char channel)
{
SPI_Write_Reg(WRITE_REG,RF_CH,channel);	// Write the channel number which works on the RFM70
}

/**************************************************
Function: Send_Packet
Description:
fill FIFO to send a packet
Parameter:
type: WR_TX_PLOAD or  W_TX_PAYLOAD_NOACK_CMD
pbuf: a buffer pointer
len: packet length
Return:
None
**************************************************/
void Send_Packet(RFM70_TRx_TypeDef type,unsigned char* pbuf,unsigned char len)
{
unsigned char fifo_sta;

fifo_sta=SPI_Read_Reg(FIFO_STATUS);	// read register FIFO_STATUS's value
if((fifo_sta&FIFO_STATUS_TX_FULL)==0)//if not full, send data (write buff)
{
	//GPIO_WriteHigh(GPIOA, GPIO_PIN_4);	// RED LIGHT = 1	SYGNALIZACJA !!!	//FIXME: Jeżli potrzebna włączyć sygnalizację LEDem
	SPI_Write_Buf(WRITE_REG, type, pbuf, len); // Writes data to buffer
	delay_50ms();
	//GPIO_WriteLow(GPIOA, GPIO_PIN_4);	// RED LIGHT = 0	SYGNALIZACJA !!!		//FIXME: Jeżli potrzebna włączyć sygnalizację LEDem
	delay_50ms();
}
}

/**************************************************
Function: Receive_Packet
Description:
read FIFO to read a packet
Parameter:
None
Return:
None
**************************************************/

void Receive_Packet(unsigned char *rx_buf)
{
unsigned char len,i,sta,fifo_sta;
//unsigned char rx_buf[MAX_PACKET_LEN];
for(i = 0; i < MAX_PACKET_LEN ; i++)rx_buf[i] = 0;	// writing zeros to rx_buf
sta=SPI_Read_Reg(STATUS);	// read register STATUS's value

if((STATUS_RX_DR&sta) == 0x40)				// if receive data ready (RX_DR) interrupt
{
	do
	{
		len=SPI_Read_Reg(R_RX_PL_WID_CMD);	// read length of recived packet

		if(len<=MAX_PACKET_LEN)
		{
			SPI_Read_Buf(RD_RX_PLOAD, rx_buf, len);// read receive payload from RX_FIFO buffer
		}
		else
		{
			SPI_Command(FLUSH_RX);	//	bad data reviced - flush Rx
		}

		fifo_sta=SPI_Read_Reg(FIFO_STATUS);	// read register FIFO_STATUS's value

	}while((fifo_sta&FIFO_STATUS_RX_EMPTY)==0); //while not empty
}
SPI_Write_Reg(WRITE_REG, STATUS, sta);// clear RX_DR or TX_DS or MAX_RT interrupt flag
}

void Ini_Bank0()
{
unsigned char i, j;	// j-counter, i-variable
	unsigned char WriteArr[12];
//unsigned char rx_buf_test[MAX_PACKET_LEN];

SwitchCFG(0);	//switch to bank0

for(j=0;j<23;j++)	//initialize RFM70 - REGISTERS
{
	SPI_Write_Reg(WRITE_REG, Bank0_Reg[j][0], Bank0_Reg[j][1]);
}

for(j=0;j<5;j++)	//initialize RFM70 - PIPES (RX0)
{
	WriteArr[j]=RX0_Address[j];
}
SPI_Write_Buf(WRITE_REG, RX_ADDR_P0, &(WriteArr[0]), 5);

for(j=0;j<5;j++)	//initialize RFM70 - PIPES (RX1)
{
	WriteArr[j]=RX1_Address[j];
}
SPI_Write_Buf(WRITE_REG, RX_ADDR_P1, &(WriteArr[0]), 5);

for(j=0;j<5;j++)	// initialize RFM70 - TX_ADDR
{
	WriteArr[j]=RX0_Address[j];
}
SPI_Write_Buf(WRITE_REG, TX_ADDR, &(WriteArr[0]), 5);

i=SPI_Read_Reg(FEATURE);
if(i==0) // i!=0 showed that chip has been actived.so do not active again.
	SPI_Activate(ACTIVATE_CMD,0x73); // Activate
for(j=22;j>=21;j--)
{
	SPI_Write_Reg(WRITE_REG, Bank0_Reg[j][0], Bank0_Reg[j][1]); // Reinitialize the start value of DYNPD and FEATURE
}
}
void Ini_Bank1()
{
unsigned char j;
	unsigned char WriteArr[12];

SwitchCFG(1);
//	reg:00
for(j=0; j<4; j++)
{
	WriteArr[j]=Bank1_Reg00[j];
}
SPI_Write_Ini_Buf(WRITE_REG, A_00, &(WriteArr[0]),4);
//	reg:01
for(j=0; j<4; j++)
{
	WriteArr[j]=Bank1_Reg01[j];
}
SPI_Write_Ini_Buf(WRITE_REG, A_01, &(WriteArr[0]),4);
//	reg:02
for(j=0; j<4; j++)
{
	WriteArr[j]=Bank1_Reg02[j];
}
SPI_Write_Ini_Buf(WRITE_REG, A_02, &(WriteArr[0]),4);
//	reg:03
for(j=0; j<4; j++)
{
	WriteArr[j]=Bank1_Reg03[j];
}
SPI_Write_Ini_Buf(WRITE_REG, A_03, &(WriteArr[0]),4);
//	reg:04
for(j=0; j<4; j++)
{
	WriteArr[j]=Bank1_Reg04[j];
}
SPI_Write_Ini_Buf(WRITE_REG, A_04, &(WriteArr[0]),4);
//	reg:05
for(j=0; j<4; j++)
{
	WriteArr[j]=Bank1_Reg05[j];
}
SPI_Write_Ini_Buf(WRITE_REG, A_05, &(WriteArr[0]),4);
//	reg:0C
for(j=0; j<4; j++)
{
	WriteArr[j]=Bank1_Reg0C[j];
}
SPI_Write_Ini_Buf(WRITE_REG, A_0C, &(WriteArr[0]),4);
//	reg:0D
for(j=0; j<4; j++)
{
	WriteArr[j]=Bank1_Reg0D[j];
}
SPI_Write_Ini_Buf(WRITE_REG, A_0D, &(WriteArr[0]),4);
//	reg:0E
for(j=0; j<11; j++)
{
	WriteArr[j]=Bank1_Reg0E[j];
}
SPI_Write_Ini_Buf(WRITE_REG, A_0E, &(WriteArr[0]),11);
}
/**************************************************/
void RFM70_Initialize()
{
delay_200ms();	//delay more than 50ms.

       Ini_Bank0();
Ini_Bank1();
delay_50ms();
SwitchCFG(0);	//switch back to Bank0 register access
}

/**************************************************         
Function: DelayMs();                                  

Description:                                                
delay ms,please implement this function according to your MCU.
**************************************************/
void DelayMs(int ms)
{


}

main.c

/* Includes */
#include <stddef.h>
#include "stm32f0xx.h"
#include "RFM70.h"

#include "stm32f0xx_cec.h"
#include "stm32f0xx_crc.h"
#include "stm32f0xx_comp.h"
#include "stm32f0xx_dac.h"
//#include "stm32f0xx_dbgmcu.h"
#include "stm32f0xx_dma.h"
#include "stm32f0xx_exti.h"
#include "stm32f0xx_flash.h"
#include "stm32f0xx_gpio.h"
#include "stm32f0xx_syscfg.h"
#include "stm32f0xx_i2c.h"
#include "stm32f0xx_iwdg.h"
#include "stm32f0xx_pwr.h"
#include "stm32f0xx_rcc.h"
#include "stm32f0xx_rtc.h"
#include "stm32f0xx_spi.h"
#include "stm32f0xx_tim.h"
#include "stm32f0xx_usart.h"
#include "stm32f0xx_wwdg.h"
#include "stm32f0xx_misc.h"


/*      Global variables----------------------------------------------------------*/
const unsigned char tx_buf[17] =
{ 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3a, 0x3b, 0x3c,
	0x3d, 0x3e, 0x3f, 0x78 };
unsigned char rx_buf[MAX_PACKET_LEN];

#define MASTER	1
//#define SLAVE	1

//#define ZL31ARM	1
#define STM32VL_DISCOVERY	1

#define true 1
#define false 0

#ifdef ZL31ARM
#define LED_PORT	GPIOB
#define LED_PIN		GPIO_Pin_1

void LED_on(){ GPIO_ResetBits(LED_PORT,LED_PIN); }
void LED_off(){ GPIO_SetBits(LED_PORT,LED_PIN); }
#endif

#ifdef STM32VL_DISCOVERY
#define LED_PORT	GPIOC
#define LED_PIN		GPIO_Pin_9

void LED_on(){ GPIO_SetBits(LED_PORT,LED_PIN); }
void LED_off(){ GPIO_ResetBits(LED_PORT,LED_PIN); }
#endif

//	Initialization
void Initialization(void);
void CLK_Configuration(void);
void SPI_Configuration(void);
void init_mcu(void);
void init_port(void);

//	Delays
void power_on_delay(void);
void delay_200ms(void);
void delay_50ms(void);
void delay_5ms(void);
void delay_1ms(void);
void sub_program(void);

int main(void)
{

#ifdef MASTER
unsigned char i, chksum;
unsigned char temp_buf[32];
int tempo = 0;
unsigned char chktempo = false;
Initialization();

RFM70_SwitchToTxMode();

while (1)
{
	for (i = 0; i < 5; i++)
		delay_200ms(); // 1 sec delay
	for (i = 0; i < 17; i++)
	{
		temp_buf[i] = tx_buf[i]; // write data from tx_buf -> temp_buf, from where it will be sent
	}
	Send_Packet(W_TX_PAYLOAD_NOACK_CMD, temp_buf, 17);
	//      -------------------------------------------------
	RFM70_SwitchToRxMode();
	for (i = 0; i < tempo; i++)
		delay_1ms();
	Receive_Packet(rx_buf);

	if (rx_buf[0] != 0)
	{
		chktempo = true;
		chksum = 0;
		for (i = 0; i < 16; i++)
		{
			chksum += rx_buf[i];
		}

		if (chksum == rx_buf[16] && rx_buf[0] == 0x30) // 8 bit sum of the transmited packet [16]=0x3 78, [0]=0x30
		{
			LED_on();
			delay_50ms();
			delay_50ms();
			LED_off();
		}
	}
	if (chktempo == false)
		tempo++;
	RFM70_SwitchToTxMode();
}
#endif

#ifdef SLAVE
int i;
unsigned char chksum, temp_buf[32];
Initialization();
RFM70_SwitchToRxMode();

while (1)
{
	Receive_Packet(rx_buf);

	if (rx_buf[0] != 0)
	{
		chksum = 0;
		for (i = 0; i < 16; i++)
		{
			chksum += rx_buf[i];
		}

		if (chksum == rx_buf[16] && rx_buf[0] == 0x30) // 8 bit sum of the transmited packet [16]=0x3 78, [0]=0x30
		{
			LED_on();
			delay_50ms();
			delay_50ms();
			LED_off();

			RFM70_SwitchToTxMode();
			//for(i = 0; i < 5; i++)delay_50ms();   // 1 sec delay
			for (i = 0; i < 17; i++)
			{
				temp_buf[i] = tx_buf[i]; // write data from tx_buf -> temp_buf, from where it will be sent
			}
			Send_Packet(W_TX_PAYLOAD_NOACK_CMD, temp_buf, 17);
		}
		RFM70_SwitchToRxMode();
	}
}
#endif
}

void Initialization()
{
CLK_Configuration();
init_mcu();
SPI_Configuration();
power_on_delay(); 		// delay for RFM70
RFM70_Initialize(); 	// RFM70 init - please look on RFM70.c
}

/*********************************************************
Function: CLK_Configuration();

Description:
initialize mcu clock
*********************************************************/
void CLK_Configuration(void)
{
  //Konfiguracja RCC (dołączenie do GPIOA oraz do SPI1)
  RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA,ENABLE);
  RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB,ENABLE);
  RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOC,ENABLE);
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1,ENABLE);
//	  RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2,ENABLE);
}

/*********************************************************
Function: init_mcu();

Description:
initialize mcu.
*********************************************************/
void init_mcu(void)
{
init_port();
}
/*********************************************************
Function: SPI_Configuration;

Description:
configure SPI.
*********************************************************/
void SPI_Configuration(void)
{
  //Struktury inicjalizacyjne
  SPI_InitTypeDef SPI_InitStructure;

  //Konfiguracja SPI1
  SPI_InitStructure.SPI_Direction=SPI_Direction_2Lines_FullDuplex;
  SPI_InitStructure.SPI_Mode=SPI_Mode_Master;
  SPI_InitStructure.SPI_DataSize=SPI_DataSize_8b;
  SPI_InitStructure.SPI_CPOL=SPI_CPOL_Low;
  SPI_InitStructure.SPI_CPHA=SPI_CPHA_1Edge;
  SPI_InitStructure.SPI_NSS=SPI_NSS_Soft;
  SPI_InitStructure.SPI_BaudRatePrescaler=SPI_BaudRatePrescaler_256;
  SPI_InitStructure.SPI_FirstBit=SPI_FirstBit_MSB;

  SPI_Init(SPI1,&SPI_InitStructure);

  SPI_Cmd(SPI1,ENABLE);
}



/*********************************************************
Function: init_port();

Description:
initialize port.
*********************************************************/

void init_port(void)
{

GPIO_InitTypeDef GPIO_InitStructure;

  //PA4 - ChipSelect
  GPIO_InitStructure.GPIO_Pin=CSN_PIN;
  //GPIO_InitStructure.GPIO_Mode=GPIO_Mode_Out_PP;
  GPIO_InitStructure.GPIO_Mode=GPIO_Mode_OUT;
  GPIO_InitStructure.GPIO_OType=GPIO_OType_PP;
  GPIO_InitStructure.GPIO_Speed=GPIO_Speed_50MHz;
  GPIO_Init(CSN_PORT,&GPIO_InitStructure);

  //PA4 - ChipEnable
  GPIO_InitStructure.GPIO_Pin=CE_PIN;
  //GPIO_InitStructure.GPIO_Mode=GPIO_Mode_Out_PP;
  GPIO_InitStructure.GPIO_Mode=GPIO_Mode_OUT;
  GPIO_InitStructure.GPIO_OType=GPIO_OType_PP;
  GPIO_InitStructure.GPIO_Speed=GPIO_Speed_50MHz;
  GPIO_Init(CE_PORT,&GPIO_InitStructure);

  //PA5 - SCK
  GPIO_InitStructure.GPIO_Pin=SCK_PIN;
  //GPIO_InitStructure.GPIO_Mode=GPIO_Mode_AF_PP;
  GPIO_InitStructure.GPIO_Mode=GPIO_Mode_AF;
  GPIO_InitStructure.GPIO_OType=GPIO_OType_PP;
  GPIO_Init(SCK_PORT,&GPIO_InitStructure);

  //PA7 - MOSI
  GPIO_InitStructure.GPIO_Pin=MOSI_PIN;
  GPIO_Init(MOSI_PORT,&GPIO_InitStructure);

  //PA6 - MISO
  GPIO_InitStructure.GPIO_Pin=MISO_PIN;
  //GPIO_InitStructure.GPIO_Mode=GPIO_Mode_IPU;
  GPIO_InitStructure.GPIO_Mode=GPIO_Mode_IN;

  GPIO_InitStructure.GPIO_Speed=GPIO_Speed_50MHz;
  GPIO_Init(MISO_PORT,&GPIO_InitStructure);

  //LED
  GPIO_InitStructure.GPIO_Pin=LED_PIN;
  //GPIO_InitStructure.GPIO_Mode=GPIO_Mode_Out_PP;
  GPIO_InitStructure.GPIO_Mode=GPIO_Mode_OUT;
  GPIO_InitStructure.GPIO_OType=GPIO_OType_PP;
  GPIO_InitStructure.GPIO_Speed=GPIO_Speed_10MHz;
  GPIO_Init(LED_PORT,&GPIO_InitStructure);
  LED_off();

  //FIXME - czy przypadkiem nie korzysta z innych linii? (np. IRQ)
/*
GPIO_DeInit(GPIOA);
GPIO_DeInit(GPIOG);
GPIO_DeInit(GPIOD);
//	RFM70 pins definition

GPIO_Init(GPIOG, GPIO_PIN_0, GPIO_MODE_OUT_PP_LOW_FAST); // CSN chip select active low
GPIO_Init(GPIOG, GPIO_PIN_1, GPIO_MODE_IN_PU_IT); // IRQ - Maskable interrupt pin active low
GPIO_Init(GPIOA, GPIO_PIN_5, GPIO_MODE_OUT_PP_LOW_FAST); // CE (SPI master/slave)

// 	Diodes on ports

GPIO_Init(GPIOA, GPIO_PIN_4, GPIO_MODE_OUT_PP_LOW_FAST); // RED		- Send
GPIO_Init(GPIOD, GPIO_PIN_0, GPIO_MODE_OUT_PP_LOW_FAST); // GREEN	- Receive

//	Initialized values
CE_Low();
CSN_High();
GPIO_WriteHigh(GPIOD, GPIO_PIN_0);	//ustawienia LEDów
GPIO_WriteLow(GPIOA, GPIO_PIN_4);	//ustawienia LEDów
*/
}

/*********************************************************
Function:  interrupt ISR_timer()

Description:

*********************************************************/
/*
@far @interrupt void TIM4_UPD_OVF_IRQHandler(void) // Interrupt of TIM4 ovf
{
unsigned char i;
//;
if (TIM4_GetFlagStatus(TIM4_IT_UPDATE) == SET)
{

	TIM4_ClearFlag(TIM4_FLAG_UPDATE);
}
}
*/
/*********************************************************
Function:      power_on_delay()

Description:
Delay for RFM70
*********************************************************/
void power_on_delay(void)
{
unsigned int i;
for (i = 0; i < 1000; i++)
{
	delay_1ms();
}
}
/********************************************************

*********************************************************/
void delay_200ms(void)
{
unsigned char j;
for (j = 0; j < 40; j++)
{
	delay_5ms();
}
}
/*********************************************************
Function: delay_50ms();

Description:

*********************************************************/
void delay_50ms(void)
{
unsigned char j;
for (j = 0; j < 10; j++)
{
	delay_5ms();
}
}
/*********************************************************
Function: delay_5ms();

Description:

*********************************************************/
void delay_5ms(void)
{
int i;
for (i = 0; i < 5; i++) // 85*5
{
	delay_1ms();
}
}
/*********************************************************
Function: delay_1ms();

Description:

*********************************************************/
void delay_1ms(void)
{
int i;
#ifdef ZL31ARM
for (i = 0; i < 2200; i++)
#endif
#ifdef STM32VL_DISCOVERY
	for (i = 0; i < 1000; i++)
#endif
{
	__NOP();
}
}

//**********************************BLACKGK********************************************/

#ifdef  USE_FULL_ASSERT

/**
* @brief  Reports the name of the source file and the source line number
*   where the assert_param error has occurred.
* @param  file: pointer to the source file name
* @param  line: assert_param error line source number
* @retval None
*/
void assert_failed(unsigned char* file, unsigned char line)
{
/* User can add his own implementation to report the file name and line number,
 ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */

/* Infinite loop */
while (1)
{
}
}
#endif

/*
* Minimal __assert_func used by the assert() macro
* */
void __assert_func(const char *file, int line, const char *func,
	const char *failedexpr)
{
while (1)
{
}
}

/*
* Minimal __assert() uses __assert__func()
* */
void __assert(const char *file, int line, const char *failedexpr)
{
__assert_func(file, line, NULL, failedexpr);
}

#ifdef USE_SEE
#ifndef USE_DEFAULT_TIMEOUT_CALLBACK
/**
* @brief  Basic management of the timeout situation.
* @param  None.
* @retval sEE_FAIL.
*/
unsigned char sEE_TIMEOUT_UserCallback(void)
{
/* Return with error code */
return sEE_FAIL;
}
#endif
#endif /* USE_SEE */
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